UCR EE/CS120B: Digital Systems

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Lab 5: FSMD Design of a GCD Calculator

I. Introduction

The purpose of this lab is to implement a finite state machine with datapath (FSMD) in VHDL to calculate the Greatest Common Divisor (GCD) of 2 numbers.

Writing a FSMD in VHDL is like writing a behavioral FSM except with additional data manipulation statements (variable assignment statements) included in the states.

The FSMD has the following inputs and output:

• go: In put signal to start the computation.
• x and y: Two 4-bit inputs.
• Out: A 4-bit output of the result.

The algorithm for calculating the GCD of x and y is as follows:

while (x != y) {

if (x < y)

y = y – x

else

x = x – y

}

output x

II. Implementation

III. Downloading

Once you have verified your results using Aldec HDL, check out an XS40 board from the T.A. Download your code and verify your results.

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