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The STB
(STorage Board) features a 1 MB NOR chip, (MP25P80, STM) for
page level erase. This is extremely important for bucket based
indexing schemes and leads to an efficient method to erase and
retreive data from the flash. Additionally the STB flaunts a 1
GB, NAND (KODAK SD-Card) for gigabyte scale storage and
post-mortem archival information mining. The STB design is a 2
layer PCB, (Copper pour), designed using Cadence tools.
The STB is easily
integrated with the RISE platform utilizing the SPI bus, and
can be mounted onto the ARM 7 module using the same SPI
bus. The block diagram of the RISE platform in
conjunction with the STB is provided below.
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